Author Topic: picture scratchpad thread  (Read 492 times)

quadjfet (OP)

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picture scratchpad thread
« on: August 05, 2019, 09:52:08 pm »
misc reference pictures
« Last Edit: August 05, 2019, 09:55:08 pm by quadjfet »

quadjfet (OP)

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Re: picture scratchpad thread
« Reply #1 on: August 06, 2019, 02:47:26 am »
@pcercuei

G100 LCD Pin Mapping


TP01 - LCD_pin 1 and 3 - 3.3v - did not investigate

TP02 - LCD_pin 4 - "LCD_RESET" - JZ4725B pin 110
TP03 - LCD_pin 5 - "CS" - JZ4725B pin 57
TP04 - LCD_pin 6 - "RS" - JZ4725B pin 109
TP05 - LCD_pin 7 - "WR" - JZ4725B pin 108

TP06 - LCD_pin 17 - Data_num ?? - JZ4725B pin 1
TP07 - LCD_pin 18 - Data_num ?? - JZ4725B pin 128
TP08 - LCD_pin 19 - Data_num ?? - JZ4725B pin 127
TP09 - LCD_pin 20 - Data_num ?? - JZ4725B pin 126
TP10 - LCD_pin 21 - Data_num ?? - JZ4725B pin 124
TP11 - LCD_pin 22 - Data_num ?? - JZ4725B pin 123
TP12 - LCD_pin 23 - Data_num ?? - JZ4725B pin 122
TP13 - LCD_pin 24 - Data_num ?? - JZ4725B pin 121

pcercuei

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Re: picture scratchpad thread
« Reply #2 on: August 06, 2019, 04:11:19 pm »
TP03 - LCD_pin 5 - "CS" - JZ4725B pin 57
Thanks. Very useful information. That explains why I didn't find the GPIO to toggle it: I tried every single GPIO except for the UART pins, since I was using UART, and pin 57 is the RX.

quadjfet (OP)

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Re: picture scratchpad thread
« Reply #3 on: August 07, 2019, 06:38:45 am »
Register writes, once ready for them. I think these are the writes used when I init the panel on my breadboard setup.

https://github.com/prenticedavid/MCUFRIEND_kbv/blob/master/MCUFRIEND_kbv.cpp

Code: [Select]
case 0x7789:
        _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS;
        static const uint8_t ST7789_regValues[] PROGMEM = {
            (0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33,    //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway
            (0xB7), 1, 0x35,    //GCTRL: Gate Control [35]
            (0xBB), 1, 0x2B,    //VCOMS: VCOM setting VCOM=1.175 [20] VCOM=0.9
            (0xC0), 1, 0x04,    //LCMCTRL: LCM Control [2C]
            (0xC2), 2, 0x01, 0xFF,      //VDVVRHEN: VDV and VRH Command Enable [01 FF]
            (0xC3), 1, 0x11,    //VRHS: VRH Set VAP=4.4, VAN=-4.4 [0B]
            (0xC4), 1, 0x20,    //VDVS: VDV Set [20]
            (0xC6), 1, 0x0F,    //FRCTRL2: Frame Rate control in normal mode [0F]
            (0xD0), 2, 0xA4, 0xA1,      //PWCTRL1: Power Control 1 [A4 A1]
            (0xE0), 14, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19,     //PVGAMCTRL: Positive Voltage Gamma control       
            (0xE1), 14, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19,     //NVGAMCTRL: Negative Voltage Gamma control
        };
        static const uint8_t ST7789_regValues_arcain6[] PROGMEM = {
            (0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33,    //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway
            (0xB7), 1, 0x35,    //GCTRL: Gate Control [35]
            (0xBB), 1, 0x35,    //VCOMS: VCOM setting VCOM=??? [20] VCOM=0.9
            (0xC0), 1, 0x2C,    //LCMCTRL: LCM Control [2C]
            (0xC2), 2, 0x01, 0xFF,      //VDVVRHEN: VDV and VRH Command Enable [01 FF]
            (0xC3), 1, 0x13,    //VRHS: VRH Set VAP=???, VAN=-??? [0B]
            (0xC4), 1, 0x20,    //VDVS: VDV Set [20]
            (0xC6), 1, 0x0F,    //FRCTRL2: Frame Rate control in normal mode [0F]
            (0xCA), 1, 0x0F,    //REGSEL2 [0F]
            (0xC8), 1, 0x08,    //REGSEL1 [08]
            (0x55), 1, 0x90,    //WRCACE  [00]
            (0xD0), 2, 0xA4, 0xA1,      //PWCTRL1: Power Control 1 [A4 A1]
            (0xE0), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x2A, 0x3C, 0x55, 0x4B, 0x08, 0x16, 0x14, 0x19, 0x20,     //PVGAMCTRL: Positive Voltage Gamma control       
            (0xE1), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x29, 0x36, 0x54, 0x4B, 0x0D, 0x16, 0x14, 0x21, 0x20,     //NVGAMCTRL: Negative Voltage Gamma control
        };
        table8_ads = ST7789_regValues, table_size = sizeof(ST7789_regValues); //
        break;

Pretty sure only need the top set. I suppose you could also sniff them with the logic analyser. See attachment for what I *think* is the MSB/LSB on the data pins.
« Last Edit: August 07, 2019, 08:00:12 am by quadjfet »

quadjfet (OP)

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Re: picture scratchpad thread
« Reply #4 on: August 08, 2019, 10:08:55 pm »
.
« Last Edit: August 11, 2019, 07:39:30 am by quadjfet »

quadjfet (OP)

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Re: picture scratchpad thread
« Reply #5 on: August 08, 2019, 11:22:57 pm »
RS-12 EXT jack
4 conductor 3.5mm cable
"TRRS jack"  - https://en.wikipedia.org/wiki/TRS_connector#TRRS_standards


Tip - JZ4725B pin 115
Ring 1 - JZ4725B pin 10
Ring 2 - JZ4725B pin 113
Sleev - JZ4725B ground

« Last Edit: August 11, 2019, 07:45:17 am by quadjfet »

pcercuei

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Re: picture scratchpad thread
« Reply #6 on: August 14, 2019, 12:52:25 am »
This is what the native OS of the G100 is setting (first byte is command):

0x11
function call 0x5ca8 (msleep?) 0x78
0x36 0x60
0x3a 0x05
0xb2 0x0c 0x0c 0x00 0x33 0x33
0xb7 0x35
0xbb 0x3a
0xc0 0x2c
0xc2 0x01
0xc3 0x08
0xc4 0x20
0xc6 0x0f
0xd0 0xa4 0xa1
0xe0 0xd0 0x00 0x05 0x0e 0x15 0x0d 0x37 0x43 0x47 0x09 0x15 0x12 0x16 0x19
0xe1 0xd0 0x00 0x05 0x0e 0x0d 0x06 0x2d 0x44 0x40 0x0e 0x1c 0x18 0x16 0x19
0x00
0x2b 0x00 0x00 0x00 0xef
0x2a 0x00 0x00 0x01 0x3f
0x29
0x2c

The commands are standard MIPI DCS: https://elixir.bootlin.com/linux/latest/source/include/video/mipi_display.h#L78
« Last Edit: August 14, 2019, 01:05:53 am by pcercuei »

quadjfet (OP)

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Re: picture scratchpad thread
« Reply #7 on: August 14, 2019, 09:23:55 am »
Code: [Select]
0x11                                                                        // sleep off
function call 0x5ca8 (msleep?) 0x78                                         // datasheet: wait 5 ms
0x36 0x60                                                                   // MADCTL: sets rotation (MX, MV)
0x3a 0x05                                                                   // COLMOD: 16bpp DBI
0xb2 0x0c 0x0c 0x00 0x33 0x33                                               // PORCTRL: Porch control
0xb7 0x35                                                                   // GCTRL: Gate control voltages (+13.26, -10.43)
0xbb 0x3a                                                                   // VCOMS: 1.55V VCOM
0xc0 0x2c                                                                   // LCMCTRL: affects MADCTL (36h)
0xc2 0x01                                                                   // VDVVRHEN: set VDV, VRH reg by command, not NVM.
0xc3 0x08                                                                   // VRHS: VRH set voltage
0xc4 0x20                                                                   // VDVS: VDV set voltage
0xc6 0x0f                                                                   // FRCTRL: Framerate 60 FPS
0xd0 0xa4 0xa1                                                              // PWCTRL1: More voltages
0xe0 0xd0 0x00 0x05 0x0e 0x15 0x0d 0x37 0x43 0x47 0x09 0x15 0x12 0x16 0x19  // gamma
0xe1 0xd0 0x00 0x05 0x0e 0x0d 0x06 0x2d 0x44 0x40 0x0e 0x1c 0x18 0x16 0x19  // gamma
0x00                                                                        // NOP
0x2b 0x00 0x00 0x00 0xef                                                    // RASET: Row Address Set (frame memory viewable)
0x2a 0x00 0x00 0x01 0x3f                                                    // CASET: Column Address Set (frame memory viewable)
0x29                                                                        // DISPON: Display On
0x2c                                                                        // RAMWR: Memory Write

quadjfet (OP)

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Re: picture scratchpad thread
« Reply #8 on: August 19, 2019, 07:14:46 am »
interesting datasheet:

https://github.com/JaminCheung/x-loader/blob/master/documents/cpu/X1000_PM_20160113.pdf

hm... not really.  this is a later chip, was hoping they'd keep the registers the same but it looks like they changed all the registers around. Still a good one for a collection.
« Last Edit: August 19, 2019, 09:33:59 am by quadjfet »